AMD is rumored to be building its next-generation CCD (core complex die) that implements the "Zen 6" microarchitecture, on the 3 nm TSMC N3E foundry node. This is part of a set of rumors from ChipHell forum, which got past rumors on AMD right. Apparently, AMD will also refresh the I/O dies for its n...
I thought one of the major reasons for getting into chiplets was yields and that the I/O die didnt benefit from scaling it down any more?
I don’t think it’s that it doesn’t benefit, but its benefits have little effect on performance. On Zen 4 the io die adds a constant 30W to the power usage (which is a huge portion of the total TDP) so maybe they want want to reclaim some of that